There is no such thing out there, is there?
The best I could find is a die-hard DIY option based on an L2 switch IC like Microchip’s KSZ8567 (or similar) or NXP’s SJA1105 family. Being L2 devices, they are unable to manage IGMP (or any other protocol for that matter) at L3 and above (makes sense).
KSZ8567, for instance, captures IGMP packets and forwards them to the host port, where there is expected to be a computing device (an MCU perhaps) responsible for managing the IGMP state machine at L3. SJA1105 doesn’t really mention IGMP in its documentation at all, which is also fair for an L2 solution.
I am perhaps missing something here, so any tips would be welcome.